1. Field of the Invention
The present invention relates generally to semiconductor manufacturing processes and inspection, and more specifically, to a method and apparatus for classifying semiconductor process signatures for the purpose of allowing semiconductor manufacturers to quickly improve their product yields.
2. Description of the Related Art
The continued trend in semiconductor manufacturing towards higher density devices and larger wafer formats, along with the increased application of optical image-based defect detection and review workstations for process monitoring has generated considerable amounts of data to be evaluated by fab production personnel. This data is necessary to evaluate the state of the manufacturing process to quickly diagnose process problems and to ultimately improve product yield.
The increased flow of information that must be quickly and correctly evaluated is resulting in data reduction schemes which may not make the most efficient or consistent use of the available information. These schemes primarily depend on human evaluation of large numbers of electronic "wafer maps" to characterize and correct the state of the manufacturing process. However, manual viewing and evaluation of these wafermaps results in a necessarily limited throughput of wafer data and is subject to broadly varying data interpretations such as subjective or inconsistent results and misclassifications due to operator fatigue or inexperience.
U.S. Pat. No. 4,500,789 to Ban et al. describes a method and apparatus for analyzing a wafer surface in which an electron beam is projected onto a desired pattern region. The acceleration voltage of the beam is set at a value at which the distribution of the scattered electrons in a predetermined region is substantially uniform. The exposure time of the electron beam is changed when pattern data is changed.
U.S. Pat. No. 5,256,578 to Corley et al. Describes a method and apparatus for integral semiconductor wafer map recording which comprises a semiconductor wafer having a plurality of individual die thereon. Tests produce data that generate wafer maps.
U.S. Pat. No. 5,479,252 to Worster et al. describes a laser imaging system used to analyze defects on semiconductor wafers that have been detected by patterned wafer defect detecting systems. The laser imaging system uses confocal laser scanning microscopy techniques.
These and other inspection techniques are generally known. In-line inspection of semiconductor wafer products is usually performed by using optical microscopy or light scattering devices to locate and electronically map defect coordinates on a semiconductor wafer. The electronic wafer map is currently developed for approximately 10-20% of all wafers and subsequently requires a human inspector to evaluate and characterize the state of the manufacturing process based on spatial signatures in the data.
A spatial signature is a unique pattern of defects on the wafer surface which is associated with manufacturing problems. For example, a certain pattern might reveal problems with a wafer handler (e.g., a scratch), or with contamination in a chemical vapor deposition process (e.g., a random or skewed particle distribution). There are many unique signatures associated with semiconductor processing which can be used as a guide to quickly characterize and improve manufacturing.
The problem with the current manual method of wafer map evaluation is due to the limited number of wafers that can be manually evaluated in a given period of time and to the lack of objective and repeatable conclusions which can be reached in the decision making process by human inspectors. In general, while there are numerous data gathering techniques, the tools for analyzing the data need improvement in ways that will increase throughput and efficiently diagnose process limiting yield issues.